Cypress CY62157ESL Manuale Utente

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CY62157ESL MoBL
®
8-Mbit (512K x 16) Static RAM
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document #: 001-43141 Rev. ** Revised January 04, 2008
Features
Very high speed: 45 ns
Wide voltage range: 2.2V–3.6V and 4.5V–5.5V
Ultra low standby power
Typical Standby current: 2 μA
Maximum Standby current: 8 μA
Ultra low active power
Typical active current: 1.8 mA at f = 1 MHz
Easy memory expansion with CE and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Available in Pb-free 44-pin TSOP II package
Functional Description
The CY62157ESL is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Place the device
into standby mode when deselected (CE
HIGH or both BHE and
BLE
are HIGH). The input or output pins (IO
0
through IO
15
) are
placed in a high impedance state when:
Deselected (CE
HIGH)
Outputs are disabled (OE HIGH)
Both Byte High Enable and Byte Low Enable are disabled
(BHE
, BLE HIGH)
Write operation is active (CE LOW and WE LOW)
To write to the device, take Chip Enable (CE
) and Write Enable
(WE
) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
0
through IO
7
) is written into the location
specified on the address pins (A
0
through A
18
). If Byte High
Enable (BHE
) is LOW, then data from IO pins (IO
8
through IO
15
)
is written into the location specified on the address pins (A
0
through A
18
).
To read from the device, take Chip Enable (CE
) and Output
Enable (OE
) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE
) is LOW, then data from the memory
location specified by the address pins appear on IO
0
to IO
7
. If
Byte High Enable (BHE
) is LOW, then data from memory
appears on IO
8
to IO
15
. See the Truth Table on page 10 for a
complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note AN1064, SRAM System Guidelines.
Logic Block Diagram
512K x 16
RAM Array
IO
0
–IO
7
ROW DECODER
A
8
A
7
A
6
A
5
A
2
COLUMN DECODER
A
11
A
12
A
13
A
14
A
15
SENSE AMPS
DATA IN DRIVERS
OE
A
4
A
3
IO
8
–IO
15
WE
BLE
BHE
A
16
A
0
A
1
A
17
A
9
A
10
A
18
CE
Power Down
Circuit
BHE
BLE
CE
[+] Feedback [+] Feedback
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Sommario

Pagina 1 - 8-Mbit (512K x 16) Static RAM

CY62157ESL MoBL®8-Mbit (512K x 16) Static RAMCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #

Pagina 2

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 10 of 12Truth TableCE WE OE BHE BLE Inputs/Outputs Mode PowerH X X X X High-Z Deselect/Power down S

Pagina 3

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 11 of 12Package DiagramsFigure 8. 44-Pin TSOP II, 51-8508751-85087-*A[+] Feedback [+] Feedback

Pagina 4

Document #: 001-43141 Rev. ** Revised January 04, 2008 Page 12 of 12MoBL is a registered trademark and More Battery Life is a trademark of Cypress Sem

Pagina 5

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 2 of 12Pin ConfigurationFigure 1. 44-Pin TSOP II (Top View)Product Portfolio Product Range VCC Ran

Pagina 6

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 3 of 12Maximum RatingsExceeding the maximum ratings may impair the useful life of thedevice. These

Pagina 7

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 4 of 12CapacitanceTested initially and after any design or process changes that may affect these pa

Pagina 8

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 5 of 12Data Retention Characteristics Over the Operating RangeParameter Description Conditions Min

Pagina 9

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 6 of 12Switching Characteristics Over the Operating Range [9] Parameter Description45 nsUnitMin Max

Pagina 10 - CY62157ESL MoBL

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 7 of 12Switching WaveformsFigure 2. Read Cycle No.1: Address Transition Controlled. [14, 15]Figure

Pagina 11

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 8 of 12Figure 4. Write Cycle No 1: WE Controlled [13, 17, 18]Figure 5. Write Cycle 2: CE Controll

Pagina 12

CY62157ESL MoBL®Document #: 001-43141 Rev. ** Page 9 of 12Figure 6. Write Cycle 3: WE controlled, OE LOW [18]Figure 7. Write Cycle 4: BHE/BLE Contro

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