Cypress CY7C1394BV18 Manuale Utente Scaricare il pdf (Pagina 3)

CY7C1392BV18, CY7C1992BV18

CY7C1393BV18, CY7C1394BV18

Document #: 38-05623 Rev. *D Page 3 of 31

Logic Block Diagram (CY7C1393BV18)

Logic Block Diagram (CY7C1394BV18)

512K x 18 Array

CLK

(18:0)

Gen.

Control

Logic

Address

[17:0]

Read Add. Decode

Read Data Reg.

[17:0]

Reg.

BWS

[1:0]

REF

Write Add. Decode

Write

Data Reg

R/W

DOFF

512K x 18 Array

Write

Data Reg

Control

Logic

256K x 36 Array

CLK

(17:0)

Gen.

Control

Logic

Address

[35:0]

Read Add. Decode

Read Data Reg.

[35:0]

Reg.

BWS

[3:0]

REF

Write Add. Decode

Write

Data Reg

R/W

DOFF

256K x 36 Array

Write

Data Reg

Control

Logic

[+] Feedback

1 2 3 4 5 6 7 8 ... 30 31

Burst Architecture 1
CY7C1392BV18, CY7C1992BV18 10
CY7C1393BV18, CY7C1394BV18 10
[+] Feedback 16
Power Up Sequence 19
DLL Constraints 19
Operating Range 20
Capacitance 22
Thermal Resistance 22
Switching Waveforms 25

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Cypress CY7C1394BV18 Manuale Utente Pagina 3

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